Dielectric capacitors with three-dimensional nanoscale interdigital electrodes for energy storage

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Science Advances  23 Oct 2015:
Vol. 1, no. 9, e1500605
DOI: 10.1126/sciadv.1500605


Dielectric capacitors are promising candidates for high-performance energy storage systems due to their high power density and increasing energy density. However, the traditional approach strategies to enhance the performance of dielectric capacitors cannot simultaneously achieve large capacitance and high breakdown voltage. We demonstrate that such limitations can be overcome by using a completely new three-dimensional (3D) nanoarchitectural electrode design. First, we fabricate a unique nanoporous anodic aluminum oxide (AAO) membrane with two sets of interdigitated and isolated straight nanopores opening toward opposite planar surfaces. By depositing carbon nanotubes in both sets of pores inside the AAO membrane, the new dielectric capacitor with 3D nanoscale interdigital electrodes is simply realized. In our new capacitors, the large specific surface area of AAO can provide large capacitance, whereas uniform pore walls and hemispheric barrier layers can enhance breakdown voltage. As a result, a high energy density of 2 Wh/kg, which is close to the value of a supercapacitor, can be achieved, showing promising potential in high-density electrical energy storage for various applications.

  • dielectric capacitor
  • energy storage
  • Energy density
  • anodic aluminum oxide (AAO)


Rechargeable energy storage devices are key components of portable electronics, computing systems, and electric vehicles. Hence, it is very important to achieve high-performance electrical energy storage systems with high energy and high power density for our future energy needs (1, 2). Among various storage systems, dielectric capacitors, made from two metal electrodes separated by a solid dielectric film, have been widely considered as highly stable energy storage systems with the highest power. However, their energy storage capability lags behind because only limited surface charges are usable (3, 4). Therefore, enhancing the energy density of dielectric capacitors as an alternative approach to the high-performance storage systems has attracted the interest of many scientists (316). The current strategy is simply to increase the specific surface area of the electrodes of energy storage systems (316), where nanostructured materials with large specific surface areas have offered exciting opportunities for electrical energy storage devices with a high energy density. For instance, “trench” capacitors containing metal-insulator-metal (MIM) layer stacks have been fabricated inside nanoporous/microporous materials for energy storage (3, 4, 916). By successive atomic layer deposition (ALD) of TiN, Al2O3, and TiN layers, nanotubular MIM capacitors were fabricated in nanoporous anodic aluminum oxide (AAO) membranes, with a unit-area capacitance of ~10 μF/cm2 for a 1-μm-thick AAO membrane (3) and an energy density of 1.5 Wh/kg (4). However, high breakdown voltages cannot be achieved in these dielectric capacitors. Thus, for a high-performance dielectric capacitor, stable dielectric and new nanoarchitectural electrodes are required to enhance the breakdown voltages and the associated energy densities.

Nanoporous AAO is formed by electrochemical oxidation of aluminum in acidic solutions (17). It is widely used as a template to synthesize nanowire (18, 19), nanotube (20), and nanocable (21) arrays. The fascinating features of nanoporous AAO, including a uniform pore wall thickness, hemispheric barrier layers at the pore bottom, and a high dielectric constant (22), can be applied in dielectric capacitors to enhance the performance. Furthermore, in comparison with deposited aluminum oxides such as by ALD, AAO could be a good option especially for MIM structures to achieve the expected lower current leakage and higher breakdown voltage (23).

Recently, it was reported that three-dimensional (3D) interdigital electrodes could improve the performance of electrical energy storage systems (24). In succession, 3D interdigital microelectrodes (they are actually 2D interdigital current collectors) have been fabricated to enhance the performance of supercapacitors (25) and batteries (26, 27). However, real 3D nanoscale interdigital electrodes have never been realized in practice and have only appeared in modeling and simulation studies (24). Here, we demonstrate a unique dielectric capacitor with 3D nanoscale interdigital electrodes, as schematically shown in Fig. 1A. In our new capacitor, a uniquely structured nanoporous AAO membrane with two sets of interdigitated and isolated straight nanopores with large and small diameters, opening toward opposite planar surfaces, acts as the dielectric material. Two sets of carbon nanotube (CNT) arrays with large (denoted as electrode I) and small (denoted as electrode II) diameters, grown in the two sets of nanopores of the uniquely structured AAO membrane, act as interdigitated positive and negative electrodes, respectively. Thus, a high energy density of about 2 Wh/kg, close to the value of supercapacitors, is achieved.

Fig. 1 Schematic depiction of the structure, fabrication process, and energy storage mechanism of the designed dielectric capacitor.

(A) Dielectric capacitor with 3D interdigital electrode. (B) Breakdown structure of the dielectric capacitor. CVD, chemical vapor deposition. (C) Fabrication process of the uniquely structured AAO membrane. (D) Schematic depiction of the energy storage mechanism of a unit cell in the newly structured dielectric capacitor from side view (top) and top view (bottom).


Dielectric capacitor architecture

Figure 1B schematically shows the component parts of the newly designed dielectric capacitor, illustrating that the capacitor consists of the uniquely structured nanoporous AAO membrane as a dielectric and two asymmetrical arrays of CNTs as two opposite electrodes. The arrangement of the interdigital electrodes with each large-diameter CNT surrounded by six small-diameter CNTs (equivalent to the tubular MIM nanocapacitors, fig. S1) can help the capacitor to form a relatively uniform electric field and better balance the negative and positive charges. Here, the uniquely structured nanoporous AAO membrane was prepared using a combinatorial process of consecutive “mild” anodization (MA) and “hard” anodization (HA) of Al foils (28, 29) to form the large-diameter pores (denoted as set I pores), removing the remaining Al and subsequently wet-chemical etching from the barrier layer surface side to form the small-diameter pores (denoted as set II pores), as shown in Fig. 1C. This produces a uniquely structured nanoporous AAO membrane with two sets of parallel pores and each large-diameter pore in set I surrounded by six set II small-diameter pores in a hexagonal arrangement.

Energy storage mechanism and simulation

Figure 1D schematically shows the energy storage mechanism of the newly structured dielectric capacitor. The equivalent planar capacitance is given by CtotalC1 + C2 + C3, where C1 is the capacitance between two neighboring small-diameter and large-diameter CNTs belonging to the two reverse electrodes. C2 and C3 are the capacitance between the two arrays of CNT tips and their reverse current collectors (top), respectively. It is obvious that C1 dominates the total capacitance because of the large side areas of the CNTs. When a potential is applied, a static electric field develops across the dielectric, causing negative charges to collect on the surface of the large-diameter CNTs and positive charges on the surface of the small-diameter CNTs (or vice versa) (bottom). Then, energy is stored in the electrostatic field. The local electric field and charge distribution in the new capacitors (fig. S2) are simulated using the finite element method [the dielectric constant value of Al2O3 is around 9 (22)], and the calculated capacitance for a 1-μm-thick membrane can reach up to 9.8 μF/cm2, being similar to that of the MIM capacitors (3).

Uniquely structured AAO characterization

The uniquely structured nanoporous AAO membrane was characterized using scanning electron microscopy (SEM). Figure 2A shows that the nanoporous membrane consists of two layers of AAO (MA-AAO and HA-AAO) formed in the MA and HA processes, respectively. In the HA process, the grooves (voids) were formed at the junctions of the cell boundaries (29) (fig. S3A). Thus, the small pores around the large pores can be easily achieved via wet-chemical etching in an HCl/CuCl2 solution (29). The bottom view in Fig. 2B shows that the small pores with a diameter of about 20 to 23 nm locate at all junctions of three cell boundaries, and these small pores are arranged as a six-membered ring structure around the large pores with barrier layers, whereas the small pores achieved from the wet-chemical etching can only reach the interface between the MA-AAO and the HA-AAO (fig. S3B). From the cleavage surface of the HA-AAO, two sets of pores are clearly identified (Fig. 2C), and set I pores are closed with the barrier layers of about 20 nm, whereas the small pores are open toward the bottom surface side (Fig. 2D). This confirms the unique structures of the nanoporous AAO membrane.

Fig. 2 SEM characterizations of the uniquely structured nanoporous AAO membrane.

(A) Side view of the as-prepared uniquely structured AAO membrane, where the interface between MA-AAO and HA-AAO is marked with a white arrow. (B) Bottom view of the uniquely structured AAO membrane after chemical etching. (C) Side view of the HA-AAO after chemical etching. The two sets of pores are indicated with white and black arrows, respectively. (D) Side view close to the barrier layer of the uniquely structured AAO membrane. The two sets of pores are marked with white and black arrows, respectively.

Newly structured dielectric capacitor characterization

The newly structured capacitor was fabricated by CVD growth of CNTs (20) in the two sets of nanopores of the uniquely structured AAO membrane. Figure 3A is an SEM side view of a broken piece of the new dielectric capacitor with two CNT arrays as electrodes, revealing that the large-diameter CNTs were embedded in the large pores and the carbon nanosheets are implanted in the small pores (the carbon nanosheets may result from the dilacerations and collapse of the CNTs in small pores) of the uniquely structured AAO membrane. The bottom view (Fig. 3B) of the dielectric capacitor indicates that the barrier layer with circular arc of set I pores is intact, which could significantly reduce local electric field concentrations to improve the performance of the dielectric capacitor (4). The side view (Fig. 3C) close to the bottom of the dielectric capacitor displays that the small-diameter CNTs are uniformly formed in the small pores. Therefore, the interdigital configuration of the newly structured capacitor is successfully realized.

Fig. 3 SEM characterizations of the newly structured dielectric capacitor.

(A) Side view of a broken piece of the dielectric capacitor. In the area marked with a dashed rectangle, a carbon nanosheet (marked with red arrows) is implanted in the small pores between the two neighboring cells where the two CNTs with large diameters (marked with white arrows) were deposited. (B) Bottom view of the capacitor. (C) Side view image close to the bottom of the newly structured dielectric capacitor. The CNTs with small diameters are marked with red arrows.

Capacitance measurements

Capacitance measurements were carried out using a digital LCR (inductance capacitance resistance) meter at 100 Hz. The capacitance densities of about 47 μF/cm2 for 6-μm-thick and 68 μF/cm2 for 10-μm-thick HA-AAO were achieved, respectively. However, the linear relationship with the pore depth is not observed, which may be ascribed to the shape variation of the small pores with the depth. Our new capacitors have an ultrahigh density of about 1.6 × 1010 cm−2 hexagonally arranged “equivalent nanocapacitor units” (Fig. 1D and calculated from Fig. 2B) is obtained. The ultrahigh density of equivalent nanocapacitor units, in combination with the large specific surface area of the uniquely structured AAO and the high dielectric constant, contributes to the high capacitance of the new dielectric capacitors.

Electrical measurements

We carried out current voltage measurements of the interdigital dielectric capacitors (fig. S4) with the HA-AAO thickness of about 6 and 10 μm and found that the breakdown voltage was 15 V (corresponding to an electric field of about 7.5 MV/cm with a capacitance of about 45 μF/cm2) (Fig. 4A), which could be ascribed to the uniform thickness of the dielectric layer and the crystallization of the uniquely structured AAO in the high-temperature CVD growth process of CNTs (21). Accordingly, when the thickness of the supporting layer (MA-AAO) is reduced to 50 nm and the pore walls are reduced to 10 nm through the chemical etching treatment (fig. S5), the energy density can reach up to 2 Wh/kg. Furthermore, the value of the critical electric field is lower than that for the Al2O3 trench capacitors (12.19 MV/cm) (10), which might result from the slightly low–order degree of the nanopores in the HA-AAO. In our capacitor, the lowest leakage current at 15 V was about 2.28 × 10−8 A/cm2, which is comparable to that of the previously reported value (10). However, the leakage current density would increase with the area of the current collector increasing (fig. S6). The reason for this should be the random small splits formed in the CVD process.

In addition, we have performed cyclic voltammograms (CVs), impedance spectrum, and charge-discharge measurements of the dielectric capacitor. Figure 4B shows the CVs of the capacitor at different scan rates. The shape of the curves is approximate to tilted parallelograms. The CV behavior indicates that the dielectric capacitor shows capacitor performance with a significantly large capacitance but has a relatively high equivalent series resistance (ESR), which could be associated with the low crystalline of CNT deposited in AAO membrane. The galvanostatic charge-discharge curve of the capacitor (Fig. 4C) displays a curvature, probably due to the presence of a parallel breakover in the capacitor (30). Figure 4D presents the complex-plane impedance spectrum of the capacitor, revealing that an ESR of about 3800 ohms is obtained. Although the ESR is relatively high, the power density of the capacitor over 1 × 106 W/kg can be achieved because of the high operation voltage (Regone plot in Fig. 5). We believe that the high-performance dielectric capacitors with low ESR could be obtained if the CVD parameters are optimized.

Fig. 4 Electrical measurements of dielectric capacitors.

(A) Current-voltage curve. The current density is relative to the full area of the dielectric capacitor. The thickness of HA-AAO was about 6 μm, the diameter of collector electrode was about 350 μm, and the dielectric thickness was about 20 nm. (B to D) CVs (B), constant current (4 μA) charge-discharge curve (C), and impedance spectrum (D) of the dielectric capacitor. The impedance measurement was carried out at a dc bias of 0 V with a sinusoidal signal of 5 mV over a frequency range from 105 to 1 Hz.

Fig. 5 Ragone plot showing high energy and high power densities of the newly structured dielectric capacitor.

Compared with the reported data in the literature (table S1), our capacitors excel all other dielectric capacitors in energy density. Therefore, in contrast to these previous dielectric capacitors, we expect that our newly structured dielectric capacitors could be more suitable for the application in the field that needs high energy density storage, such as accessory power supply and hybrid power systems. It is predictive that this method will provide a possibility to create unique 3D nanoarchitectural electrodes and may offer a chance to explore its high potentials in capacitor, battery, and other related applications.


We have shown a newly designed dielectric capacitor with 3D nanoscale interdigital electrodes fabricated through MA and HA of Al foils to form large-diameter pores, removing the remaining Al foil and wet-chemical etching from the barrier layer side to form small-diameter pores, and CVD growth of CNTs in the corresponding two sets of pores with different diameters. The capacitance density of about 47 μF/cm2 for 6-μm-thick HA-AAO was achieved, and the breakdown voltage of about 15 V was observed. As a result, the energy density of the unique dielectric capacitor can reach about 2 Wh/kg through optimizing the fabrication process. We anticipate that this work opens up a new window to rationally designing 3D nanoarchitectural electrodes for various energy storage applications.


Preparation of the uniquely structured nanoporous AAO membrane

High-purity Al foil (99.999%, 250 μm thick) was anodized in 0.3 M oxalic acid solution at 10°C under 50 V for 6 hours. Then, the formed AAO was removed (20). In the second step, the uniquely structured AAO membrane was prepared through a combinatorial process of MA and HA (28, 29) sequences and then chemical etching. First, the Al foils were anodized in 0.3 M oxalic acid solution under 50 V at 10°C for 16 hours to form MA-AAO, which was used as a supporting membrane for the next processing. Second, the voltage was gradually reduced by 2 V/min until 25 V to promote the thinning of the barrier layer. Sequentially, the Al foils were anodized in a mixed solution of 0.8 M H2SO4 + 0.1 M Al2(SO4)3 under a constant current density of 160 mA/cm2 at −2°C for 2 to 3 min to form large-diameter pores (29) (the current density was raised from 5 to 160 mA/cm2 in 60 to 90 s). Then, the remaining Al foil was removed in a saturated SnCl4 solution. Finally, the above-formed AAO membrane was etched from the bottom surface side in a solution of 19% HCl/0.2 M CuCl2 for about 35 to 38 min at 25°C to form small-diameter pores.

Growth of CNTs in the uniquely structured AAO membranes

The uniquely structured AAO membrane was placed in a tube furnace, and the temperature was raised from room temperature to 550 to 600°C in 5 hours. Then, two arrays of CNTs were grown inside the corresponding two sets of pores in the uniquely structured AAO membrane by the pyrolysis of acetylene (20) for 5 hours with a flow of gas mixture of 120 standard cubic centimeter per minute (sccm) of Ar and 3 to 4 sccm of C2H2.

Preparation of current collectors

Gold films were sputtered onto the two planar surface sides of the uniquely structured AAO membrane embedded with two sets of CNTs arrays, serving as the current collectors (fig. S4). Finally, the capacitors were placed into a plasma cleaner to remove the uncovered surface amorphous carbon.


We calculated the charge distribution on the surface of the CNTs using the finite element analysis method with periodic boundary condition (fig. S2). For a 1-μm-thick equivalent nanocapacitor unit (Fig. 1D), when the electric potential difference between the positive and the negative electrodes is set to 1 V, the charge at the CNT with a large diameter is about 0.6113 × 10−15 C, and the planar area of the equivalent nanocapacitor unit is about 6.238 × 10−11 cm2, so the capacitance of our dielectric capacitor is about 9.8 μF/cm2.


Supplementary material for this article is available at

Fig. S1. The equivalent nanocapacitor unit of the newly structured dielectric capacitor.

Fig. S2. Two-dimensional electric field intensity distributions (indicated by the color bar) of the CNT arrays belong to two reverse electrodes of the newly structured electrostatic capacitor.

Fig. S3. SEM characterizations of the uniquely structured nanoporous AAO membrane.

Fig. S4. The dielectric capacitor to be measured, with the collection electrode diameters about 200 to 500 μm (left panel) and 3.5 mm (right panel).

Fig. S5. Characterizations of the dielectric capacitor with the dielectric layer of about 10 nm.

Fig. S6. The current-voltage curve of the newly structured dielectric capacitor (6-μm-thick HA-AAO) with the collector electrode diameter of about 3.5 mm.

Table S1. Comparison of various MIM dielectric capacitors built with porous materials.

This is an open-access article distributed under the terms of the Creative Commons Attribution-NonCommercial license, which permits use, distribution, and reproduction in any medium, so long as the resultant use is not for commercial advantage and provided the original work is properly cited.


Funding: We thank the National Key Basic Research Program of China (2013CB934304 and 2014CB848900), the National Natural Science Foundation of China (51372247, 11274312, 51472245, 51472204, and U1232131), the CAS/SAFEA (Chinese Academy of Sciences/State Administration of Foreign Experts Affairs) International Partnership Program for Creative Research Teams, and the Anhui Provincial Natural Science Foundation (1308085ME58) for financial support. Author contributions: F.H., G.M., and B. Wei conceived and designed the experiments. F.H. prepared all samples. F.Z. performed simulation of the capacitors. X.Z. and B. Wu characterized the nanostructures of the samples. X.L. and X.H. prepared collector electrodes. F.H. L.S., and X.Z. carried out the electrical characterization. F.H., G.M., and B. Wei analyzed data. F.H, G.M., L.S., and B. Wei wrote the paper. All authors discussed the results and commented on the manuscript. Competing interests: The authors declare that they have no competing interests. Data and materials availability: All data needed to evaluate the conclusions in the paper are present in the paper and Supplementary Materials and will be made available by the authors upon request.
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