Research ArticleNETWORK SCIENCE

Learning of spatiotemporal patterns in a spiking neural network with resistive switching synapses

See allHide authors and affiliations

Science Advances  12 Sep 2018:
Vol. 4, no. 9, eaat4752
DOI: 10.1126/sciadv.aat4752

Abstract

The human brain is a complex integrated spatiotemporal system, where space (which neuron fires) and time (when a neuron fires) both carry information to be processed by cognitive functions. To parallel the energy efficiency and computing functionality of the brain, methodologies operating over both the space and time domains are thus essential. Implementing spatiotemporal functions within nanoscale devices capable of synaptic plasticity would contribute a significant step toward constructing a large-scale neuromorphic system that emulates the computing and energy performances of the human brain. We present a neuromorphic approach to brain-like spatiotemporal computing using resistive switching synapses. To process the spatiotemporal spike pattern, time-coded spikes are reshaped into exponentially decaying signals that are fed to a McCulloch-Pitts neuron. Recognition of spike sequences is demonstrated after supervised training of a multiple-neuron network with resistive switching synapses. Finally, we show that, due to the sensitivity to precise spike timing, the spatiotemporal neural network is able to mimic the sound azimuth detection of the human brain.

INTRODUCTION

The human brain outperforms most of the existing artificial neural networks (ANNs) in terms of energy-efficient and error-tolerant computing (1, 2). One of the main differences between ANNs and the human brain is the representation of information (3, 4): While most ANNs represent input/output data as real-valued vectors, the human brain encodes information via binary spikes. Biological neurons follow an all-or-none rule, where a neuron emits a unanimous action potential, or spike, when the stimulus is large enough; otherwise it keeps silent (5, 6). Spiking neural networks (SNNs) (7, 8) were introduced to emulate the style of information processing in the human brain, although the representation methodology, that is, how the sensory information is coded by neuron spikes, is still under debate (9, 10). In rate coding (fig. S1A) (11), the intensity of an external stimulus is represented by the spiking rate. However, information is carried by a train of spikes, thus resulting in relatively low information density and low energy efficiency. Recent biological studies provide evidence for spatiotemporal coding (12, 13), where information is represented by the spatial and temporal occurrences of the spikes. The neuron representing the strongest stimulus spikes first, followed by spikes of neurons representing lower-intensity stimuli (fig. S1B) (14). This spatiotemporal coding enables a high density of information with relatively few neurons and spikes, hence with high energy/area efficiency (9, 15).

To emulate the high synaptic density and the energy efficiency of biological neural networks, nanoscale resistive switching devices (16, 17), such as resistive random access memory (RRAM) and the phase change memory, were introduced. These devices are two-terminal nanoscale devices that can change their resistive switching in response to external stimuli, similar to the plasticity mechanism in biological synapses. Recently, a close resemblance with biological synaptic and neuronal behaviors was reported by adopting volatile RRAM devices (1820). Because of the good scaling ability and compatibility with the silicon-based technology of today’s microelectronic systems, resistive switching devices might enable the construction of large-scale neural networks with complexity comparable to the human brain (21, 22). There has been a hardware demonstration of both conventional ANNs with real-valued neuronal signals (23, 24), directly implementing matrix-vector multiplication by cross-point arrays (2528), and SNNs where the information is carried by spiking signals (21). However, the spike representation relied on a simple spatial coding, that is, neurons spike synchronously to form a spatial-only pattern (21, 2932). SNNs capable of spatiotemporal computing with RRAM synapses would greatly improve the energy and information efficiency of neuromorphic hardware, thus accelerating the progress toward human-like cognitive computing.

RESULTS

RRAM synapses and network structure

Figure 1A illustrates an elementary biological neural system with three presynaptic neurons (PREs) connected to a postsynaptic neuron (POST) via synapses between PRE axons and POST dendrites. When a PRE emits a spike, the action potential is conveyed through its axon to the synapse. PREs spiking at various times form a spatiotemporal spiking pattern. Each synaptic weight dictates the amount of the action potential that is imparted to the POST upon PRE spiking. The biological synapse, where the amount of neurotransmitter controls the synaptic weight, can be emulated by a RRAM device (Fig. 1B), where the conductance between the top electrode (TE) and the bottom electrode (BE) is controlled by the defect distribution within a dielectric layer, such as hafnium oxide (HfO2) (21, 33).

Fig. 1 Illustrative scheme of biological and hardware neural networks.

(A) Illustration of a biological neural subsystem with PREs connected with a POST via plastic synapses. PREs spike by generating an action potential along its axon and through the synapse. PREs spiking at various times form a spatiotemporal spiking pattern. (B) The biological synapse can be represented by a RRAM device, where the conductivity changes by voltage-induced ion migration and corresponding formation/dissolution of a conductive filament. (C) Typical current-voltage (I-V) curves of the RRAM device, where a positive voltage applied to the TE causes set transition (resistance change from HRS to LRS) and a negative voltage causes reset transition (resistance change from LRS to HRS). The transition to LRS is controlled by the compliance current IC, where a large IC results in a high conductance of the LRS, thus enabling time-dependent potentiation of the RRAM synapse. (D) Schematic diagram of a 1T1R synapse, connecting a PRE axon to the POST, the latter providing a feedback spike for potentiation and depression.

The basic properties of a RRAM synapse are shown in Fig. 1C. The synapse can switch from a high-resistance state (HRS) to a low-resistance state (LRS), also called set process, for a positive voltage applied to the TE. This is due to the migration of positively ionized defects such as oxygen vacancies and the consequent formation of a conductive filament connecting the two electrodes. With the application of a negative voltage, the migration-induced disconnection of the conductive filament results in a reset process, namely, the switching from LRS to HRS. Note that the LRS conductance is determined by the final size of the conductive filament, which in turn depends on the compliance current IC, that is, the maximum current that can be supplied to the RRAM device during the set transition (34). As IC increases, the size of the conductive filament formed during the set transition increases, thus resulting in an increased synaptic weight of the RRAM.

To enable time-dependent control of the synaptic weight, we connected the RRAM in series with a field-effect transistor (FET) in the synaptic circuit of Fig. 1D. The one-transistor/one-resistor (1T1R) synapse is controlled by the PRE via the FET gate terminal and conveys the synaptic current Isyn to the POST via the FET source terminal (21). The axon terminal in the PRE circuit (fig. S2B) shapes the PRE spike into an exponentially decaying pulse Vaxon controlling the gate, hence the FET current. As a result, the time delay between the PRE spike Vaxon and the POST spike VTE applied to the TE results in a time-dependent set transition or synaptic potentiation of the RRAM device, which forms the basis of the spatiotemporal processing by the RRAM synapse (35). The axon signal resembles the shape of the action potential. To represent the binary nature of the input spikes and the purpose of using the action potential–like axon signal as the temporal messenger, we use separated symbols for PRE (soma) and axon in our circuit (Fig. 1D), although they cannot be distinguished in biology.

Inference and training algorithm

First, we consider a simple 3 × 1 neural network in Fig. 2A, consisting of three PREs connected to a single POST via three RRAM synapses and the corresponding spatiotemporal recognition depicted in Fig. 2B. Let us assume that three spikes with spatiotemporal coding are emitted by the three PREs with sequence 1-2-3 and that the synaptic weights are in decreasing order from synapse #3 to synapse #1. In this case, there is a positive time/amplitude correlation of current spikes received by the POST, where later spikes have larger amplitudes. This is further shown in Fig. 2C, reporting the calculated spatiotemporal-coded PRE spikes (top), the resulting axon potentials (center), and the POST internal voltage Vint, which is proportional to the summation of the synaptic currents, namely, Vint = RnΣIsyn (bottom), where Rn is the resistance of the transimpedance amplifier (TIA) within the POST circuit (fig. S2A). Note that the individual synaptic currents are physically summed by Kirchhoff’s law at the input terminal of the POST, which thus behaves as a summing McCulloch-Pitts neuron (36). In this way, the leaky behavior of the POST Vint directly arises from the exponential shape of the axon potential, with no need for a leaky integrate-and-fire structure of the POST. In the case of positive correlation between spike times and synaptic weight (increasing weight with increasing time), Vint is relatively large, thus able to overcome the threshold Vth. Negative correlation between spike time and synaptic weight, namely, spikes arriving later being processed by weaker synapses, however, results in relatively low Vint (cannot reach Vth; Fig. 2D). The value and order of the synaptic weights thus enable selective sensitivity to a particular sequence (1-2-3 in Fig. 2), that is, the ability to recognize spatiotemporal patterns by the network.

Fig. 2 Recognition of spatiotemporal patterns.

(A) Schematic SNN with three PREs and one POST. Increasing weights w1 = 10 μs, w2 = 20 μs, and w3 = 50 μs were assumed in the simulation. (B) Conceptual scheme of a spatiotemporal network where the synaptic weight increases from synapse #1 to synapse #3, and PRE spikes have different timing. (C) Calculated PRE spikes (top), axon potential Vaxon (middle), and POST internal potential Vint (bottom), and spike sequence 1-2-3 with spike times T1 = {t1 = 2 ms, t2 = 4 ms, t3 = 6 ms}. (D) Same as (C), but for the opposite spike sequence, namely, 3-2-1 with spike times T2 = {t1 = 6 ms, t2 = 4 ms, t3 = 2 ms}. The POST internal potential overcomes the threshold in (C) due to the positive correlation between synaptic weights and spike timing, thus enabling spatiotemporal recognition.

To recognize a specific spatiotemporal pattern, the network must be instructed so that synaptic weights show positive correlation with the “true” sequence as in Fig. 2C. To this purpose, weights are updated by the Widrow-Hoff (WH) learning rule (3739). According to the WH rule (see Materials and Methods and the figs. S4A and S5), after collecting each spike in the sequence, the POST compares its output signal with the teacher signal, which labels the spiking pattern as true. The comparison can lead to three cases: If both the POST and the teacher spikes are present, the true pattern has been correctly detected (true fire), thus requiring no further weight update. If the POST spike is present without any teacher spike, a false pattern has been erroneously detected (false fire), thus requiring depression of the synaptic weights. The synapses are depressed by applying a negative update spike with amplitude VTE− < 0 (Fig. 1D), thus leading to a reset transition. Finally, if the POST spike is not present while the teacher is, the true pattern has been erroneously missed (false silence), thus requiring potentiation of the synaptic weights to achieve positive correlation with the spike sequence. This is achieved by the application of a positive update spike with amplitude VTE+ > 0 to the synapse, which results in a set transition or potentiation of the synaptic weights. A short delay Δt = tPREtPOST between the PRE spike and the POST spike leads to strong potentiation, while a long Δt leads to a weak potentiation (Fig. 3A). Note that this corresponds to a spike timing–dependent plasticity (STDP) relating spike timing with strength of the potentiation (37, 40). As a result of STDP, synaptic weights are automatically potentiated to gain a positive correlation with the sequence.

Fig. 3 Time-dependent potentiation and depression.

(A) Measured Vaxon and VTE for relatively short (left) and long (right) delays Δt = tPREtPOST between PRE and POST spikes (top) and corresponding change of the synaptic weight (bottom). Short and long delays lead to a strong and weak potentiation, respectively, due to the variation of IC driven by the exponential Vaxon. (B) Relative change of synaptic weight G/G0 as a function of Δt for potentiation (VTE > 0) and depression (VTE < 0). The weight change decreases for increasing Δt, thus evidencing STDP behavior of the 1T1R synapse. The peak value of Vaxon was 2.5 V with time constant τ = 8 ms. The TE voltage was VTE+ = 3 V for potentiation and VTE− = −1.6 V for depression. Calculation results (lines) obtained by a physical-based analytical RRAM model accurately describe the experimental behavior.

The time-dependent potentiation and depression were characterized for HfO2-based RRAM synapses with 1T1R structure. Figure 3B summarizes the STDP characteristics, namely, the ratio G/G0 between the final and initial synaptic conductance, as a function of the time delay Δt (more data and measurement details can be seen in the Supplementary Materials).

Learning and recognition of spike sequences

To demonstrate spatiotemporal sequence learning, we adopted a neural network with 16 PREs in the first layer, fully connected to a second layer of one POST via 16 RRAM synapses (Fig. 4A and fig. S4). All components were assembled on a printed circuit board (PCB), where an Arduino Due microcontroller (μC) served as supervisor to generate input and teacher spikes for the supervised training and the subsequent testing of pattern recognition (fig. S4). The 16 PREs received spatiotemporal-coded patterns in groups of four spikes for each training cycle, each pattern being labeled as true/false by the supervisor. Within each pattern, spikes were separated by a 1-ms time interval, while a pause of 50 ms was used to distinguish subsequent patterns and to allow recovery of the rest state in the axon potential Vaxon and the internal potential Vint. False patterns (for example, cycle 1 and n in Fig. 4A) and the true pattern (for example, cycle i in Fig. 4A) were submitted sequentially and randomly. For each spatiotemporal pattern, the teacher signal was submitted immediately after the last spike of the true pattern (in case of false silence) or the false pattern (in case of false fire; see figs. S5 and S6).

Fig. 4 Experimental learning of spatiotemporal patterns.

(A) Schematic illustration of the input spike patterns submitted to a 16 × 1 spatiotemporal neuromorphic network supervised by a teacher signal. The network consists of 16 PREs, 1 POST, and 16 RRAM synapses. PRE spikes are grouped in spatiotemporal patterns of four spikes, which form a training cycle. For the true sequence 1-4-9-16 (cycle i), the teacher spike is submitted to the POST to guide potentiation/depression. (B) Teacher signal and measured Vint during the training experiment, and (C) true fire, false fire, and false silence events occurring during training. (D) Color plot of the evolution of the synaptic weights. False silence events lead to synaptic potentiation of the synapses #1, #4, #9, and #16, while false fire events cause synaptic depression. After training, the synapses #1, #4, #9, and #16 are found in LRS with increasing weight, as a result of time-dependent potentiation, while other synapses are found in HRS.

We chose the spike sequence 1-4-9-16, corresponding to the 1st, 4th, 9th, and 16th PREs sequentially spiking, as the true spatiotemporal pattern. Figure 4 (B to D) shows the details of the training process, including the measured internal potential Vint (Fig. 4B), the indication of true fire, false fire, and false silence events (Fig. 4C), and the synaptic weights evolution (Fig. 4D). The teacher signal, serving as the label to mark the presentation of the true pattern, is also shown in Fig. 4B. All synaptic weights were initially prepared in random states between HRS and LRS. Convergence of the training algorithm was confirmed by successful training for different initial synaptic weights (figs. S7 and S8). From the comparison between Fig. 4C and Fig. 4D, it appears that false silence events lead to potentiation of true-pattern synapses, while false fire events result in depression of false-pattern synapses. As a result, the weights of synapses #1, #4, #9, and #16 in Fig. 4D are potentiated to LRS, while all other weights are left in HRS after training (see fig. S6). Weights of the synapses #1, #4, #9, and #16 show decreasing values from #16 to #1 as a result of the time-dependent potentiation.

After training, we tested spatiotemporal pattern recognition by applying all possible four neuron sequences and collecting Vint (Fig. 5A). As expected, the true pattern 1-4-9-16 shows the maximum Vint, as a result of the synaptic weights showing positive correlation with the spike time after training. Patterns similar to the true one, for example, the permutations of the true pattern (for example, 9-1-16-4), or patterns sharing only a fraction of the true pattern (for example, 6-4-16-9), show slightly lower Vint, thus demonstrating some level of error tolerance of the SNN. Other false patterns instead show decreasingly low Vint. To further clarify the details of the recognition process, Fig. 5B shows the measured real-time evolution of Vint in response to the submission of the true pattern collected from an oscilloscope: The internal potential increases spike after spike, eventually overcoming Vth and inducing a POST fire in response to the true pattern. On the other hand, submission of a false pattern, such as 16-7-4-1, although similar to the true pattern, cannot induce fire in Fig. 5C. Circuit simulations of our SNN are also reported in Fig. 5 (B and C), showing accurate agreement with the oscilloscope measurements. The staircase shape of Vint resembles the excitatory postsynaptic potential (EPSP) observed in a biological neural system (5, 41, 42), thus highlighting the analogy of our spatiotemporal sensitive network to biological networks in the human brain.

Fig. 5 Experimental recognition of spatiotemporal patterns.

(A) Measured Vint for all possible test sequences of four spikes out of 16 channels after training. Sequences are ordered from the highest to the lowest Vint. The true pattern 1-4-9-16 induces the highest Vint, confirming the high learning efficiency of the WH supervised learning scheme. Patterns with high similarity with the true sequence (for example, permutations of the true pattern) also show relatively high Vint, while dissimilar patterns show low Vint. (B) Evolution of Vint in response to the application of the true pattern 1-4-9-16, and (C) of a false pattern 16-7-4-1. For the true pattern, Vint shows accumulation of spikes eventually exceeding the threshold for POST fire, whereas weaker accumulation and no fire are seen for the false sequence. The evolutionary accumulation of Vint resembles the EPSP observed in a biological neural system.

Note that Vint in Fig. 5A provides a figure of merit for the similarity between a generic test sequence and a true sequence, which can be generalized to any type of sequence. For instance, a SNN with 26 PREs, each representing a letter, can check spelling errors in words. Figure S9 shows simulation results of supervised training of the word “word” and its subsequent recognition against competing sequences. The internal potential Vint was compared to the Damerau-Levenshtein (DL) distance (43), which is used for spell checking in speech recognition, DNA analysis, and other applications. Results show that Vint is more accurate and faster than the DL distance, which requires many steps for comparing each element of the sequences within at least two programming loops (44), thus supporting the applicability of our spatiotemporal network for checking spell and other sequences.

Sound localization by precise timing detection

The similarity of our spatiotemporal SNN to the biological neural system can be further illustrated by its ability to detect the precise spike timing interval, which mimics the detection of the sound location by the brain (45). As depicted in Fig. 6A, the brain detects sound location by the interaural time difference (ITD) = tLtR, where tL and tR are the times of the sound arriving at the left and right ears, respectively. The ITD, which is typically in the range of −0.6 to 0.6 ms, is the most important clue for sound azimuth location and can be processed by the brain in real time. The proposed resistive synaptic network consists of a fully connected network of two PREs, corresponding to sensors in each ear, and two POSTs, with the corresponding 2 × 2 RRAM synapses (Fig. 6B). The synaptic weight matrix is diagonal, so that one POST fires in response to the left/right pattern, while the other one fires in response to the opposite sequence. As a result, the difference between the internal potentials Vint of the two POSTs provides an indication of the sound azimuth, that is, the sound direction angle. For instance, a typical audio signal for the left and right ears (Fig. 6C) triggers the spikes of the corresponding left and right PRE neurons, which respond to the first detected wave front and dispatch the spatiotemporal spiking pattern to the network. The corresponding evolution of Vint for the two POSTs and their difference ΔVint = Vint1Vint2 between POST1 and POST2 at the time of the second PRE spike (Fig. 6E) thus indicate the azimuth of the sound signal. The positive ΔVint is due to the sound reaching the right ear first, revealing that the origin of the sound was from the right side of the receiver. Figure 6F shows the ΔVint as a function of the ITD, hence the sound azimuth, which can thus be evaluated by the value of ΔVint. The dependence of ΔVint on the sound azimuth shows the capability of the constructed spatiotemporal neural network to convert external analog stimuli into inner-brain (or inner-network) representation via spatiotemporal coding.

Fig. 6 Sound location via spatiotemporal processing.

(A) Schematic illustration of binaural effect, where the ITD provides an estimate of the direction of the sound propagation with respect to the listener. (B) Schematic structure of a 2 × 2 SNN to detect the sound direction from the ITD. The difference ΔVint between internal potentials in the two POSTs serves as the output of the network, providing information about sound direction. The inset shows the map of synaptic weights in the 2 × 2 synapse array, which enables discrimination between different directions. (C) Experimental sound waveforms of left and right ears, (D) corresponding axon potential of the two PREs, and (E) Vint for the two POSTs with their corresponding difference. The difference ΔVint in correspondence to the second PRE spike reveals the direction of the sound from the right of the listener in (C). (F) Measured and calculated ΔVint as a function of sound azimuth revealing analog information about the sound propagation direction. To correct for the different axon potential decay constant (τ = 8 ms in the hardware circuit, compared to a biological time τ = 0.5 ms), the experimental time scale in (F) was reduced by a factor of 16.

DISCUSSION

The SNN is considered to be the third generation of neural networks (7), following the first generation based on McCulloch-Pitts neurons (36) and the second generation relying on neural activation functions and gradient descent (for example, error backpropagation) as the core of the learning algorithm (46). The computational capability of the SNN is improved thanks to the brain-inspired spatiotemporal representation of spiking neurons containing multiple information, such as the timing of a specific sensory input and its relationship with other events. Previous works on RRAM-based SNNs showed learning and recognition of spatial-only patterns with no specific temporal information, which strongly reduces the capability of the SNN (21, 29). For instance, a spiking pattern of 16 PREs and only 4 PREs spiking can result in 1820 possible spatial-only patterns, while the number of possible spatiotemporal patterns with a constant spike timing interval is 43,680, that is, 24 times higher. For the case of sound origin detection, only two PREs are needed to represent all possible azimuth angles. On the other hand, rate-based coding, which is extensively embraced in RRAM SNNs (47, 48) and complementary metal-oxide semiconductor (CMOS) neuromorphic computing (49), has been questioned by many experimental observations in neuroscience (14); for instance, in the human brain visual cortex, the ability of visual pattern classification is about 100 ms, which would be too short to carry sufficient rate-based information given the low spiking rate of neurons of about 10 Hz (50). Spatiotemporal coding strongly reduces the number of spikes (hence, amount of energy) needed to represent a given analog information, compared to rate-based coding.

In summary, a RRAM-based synaptic neuromorphic network is proposed to learn and recognize spatiotemporal patterns, including spike sequences and spike groups (for example, pairs) where the spike timing carries information. The time difference of spikes among different neurons provides spatiotemporal coding with high sparsity and high information capacity. Our experiments demonstrate that the RRAM-based SNN, combined with suitable neuron circuit and operation scheme, is capable of learning spatiotemporal patterns via STDP, followed by recognition, thanks to suitably potentiated/depressed synapses. The results provide one step forward toward biorealistic computing machines capable of paralleling the energy efficiency and computing functionality of the brain.

MATERIALS AND METHODS

RRAM synapses

The RRAM devices (33) used in this study consist of a 10-nm-thick switching layer of Si-doped HfOx deposited by atomic layer deposition on a confined TiN BE with 50-nm diameter. After deposition of the reactive Ti TE on the HfOx dielectric layer, partial Ti oxidation led to depletion of oxygen from the HfOx layer and forming of an interfacial oxygen exchange layer (OEL). The OEL was functional in increasing the concentration of oxygen vacancies in HfOx, thus enhancing the leakage current in the pristine state and reducing the forming voltage. A forming operation was conducted by the application of a pulse of 3-V amplitude and 100-ms pulse width to initiate the conductive filament creation before any other operations and characteristics. The RRAM was connected via the bottom TiN electrode to a FET, which was integrated in the front-end of the same silicon chip by conventional CMOS process. The resulting 1T1R structure was controlled during forming, set, and reset processes by applying pulses to the TE and gate contacts, with grounded source contact. The conduction and switching characteristics of the RRAM (Fig. 1C) were collected by an HP4155B semiconductor parameter analyzer connected to the experimental device within a conventional probe station for electrical characterization.

Spiking neural network

In the network, each PRE represents a neuron cell and its axon terminal. Each axon terminal was connected to the gate terminal of a 1T1R synapse. All synaptic TEs were controlled by a CMOS circuit providing a constant bias Vread = −0.3 V to induce the synaptic current Isyn in response to an axon spike (21). All source terminals were connected to the POST input (23, 35, 36), consisting of a TIA to convert the summed synaptic currents ΣIsyn into the internal potential Vint. The latter was compared with the threshold voltage Vth to induce fire for Vint > Vth. During supervised training, a teacher spike was applied to the TE to induce potentiation or depression. The voltage of the TEs was switched from Vread to a pulse of positive voltage VTE+ after false silence, or negative voltage VTE− after false fire, to induce time-dependent potentiation or depression, respectively.

Training and test control system

The synaptic network was connected to an Arduino Due μC on a PCB for the training and testing of the synaptic network. To operate the network, the PRE spike sequence was first stored in the internal memory of the μC, and then the sequence was launched while monitoring the synaptic weights G and internal potential Vint at each cycle. The spike and fire potential and input currents were also monitored by a LeCroy WaveRunner oscilloscope with 600-MHz bandwidth and maximum 4 G sample/s sampling rate. Note that the μC is only necessary in providing spiking information (including the teacher signal) during the training and test stage, whereas all learning processes, that is, the adjustment of synaptic, were all achieved by the network of hybrid CMOS-neurons/resistive switching synapses in real time. For best accuracy in our PCB system, we adopted an axon potential decay constant τ = 8 ms, that is, longer than the biological action potential of about 1 ms. To match with the biological timescale (τ = 0.5 ms), the experimental timescale in Fig. 6 (C to F) was scaled down by a factor of 16. The time delay between the synaptic current detection and the update spike for the TE of the 1T1R synapse is about 12 μs to enable in situ learning.

SUPPLEMENTARY MATERIALS

Supplementary material for this article is available at http://advances.sciencemag.org/cgi/content/full/4/9/eaat4752/DC1

Note S1. STDP characteristics of single RRAM synapse.

Note S2. Inference of the network.

Note S3. Learning algorithm.

Note S4. Hardware implementation of POSTs and weight updates.

Fig. S1. Coding methods in SNN.

Fig. S2. Neuron and axon circuits.

Fig. S3. STDP experiments.

Fig. S4. Hardware implementation of the SNN.

Fig. S5. Simulation of supervised learning of spatiotemporal patterns.

Fig. S6. Experimental demonstration of spatiotemporal learning.

Fig. S7. Convergence of the network training for various initial conditions.

Fig. S8. Synaptic weight for various initial conditions.

Fig. S9. Comparison between POST potential and DL distance.

This is an open-access article distributed under the terms of the Creative Commons Attribution-NonCommercial license, which permits use, distribution, and reproduction in any medium, so long as the resultant use is not for commercial advantage and provided the original work is properly cited.

REFERENCES AND NOTES

Acknowledgments: Funding: This research has received funding from the European Research Council (ERC) under the European Union’s Horizon 2020 Research and Innovation Programme (grant agreement no. 648635). Author contributions: W.W., G.P., A.S.S., and D.I. designed the experiments. G.P. prepared the PCB, carried out the electrical experiments, and performed STDP measurements on individual synapses. W.W. conducted the device/network simulations. A.C. and N.R. designed and fabricated the RRAM devices. All authors discussed the results and contributed to the preparation of the manuscript. D.I. supervised the research. Competing interests: The authors declare that they have no competing interests. Data and materials availability: All data needed to evaluate the conclusions in the paper are present in the paper and/or the Supplementary Materials. Additional data related to this paper may be requested from the authors.
View Abstract

Navigate This Article