Fig. 1 The crystallization-orientation transition induced by engineered deposition temperature and film thickness. (A) Schematic representation of the face-on stacking in the ultrathin films (left) and the edge-on stacking in the thick films (right). (B) Schematic showing high crystallinity is induced by high deposition temperature in the face-on regime. The chemical structure of PEDOT is shown on the right. (C) Room temperature XRD maps (θ-2θ) of 10-nm PEDOT thin film deposited at 300°C (left) [the inset is the schematic of the face-on stacking (0k0)], 248-nm PEDOT thin film deposited at 190°C (middle) [the inset is the schematic of the edge-on stacking (h00)], and 23-nm PEDOT thin film deposited at 300°C (right). a.u., arbitrary units. (D) Room temperature XRD pattern for face-on samples deposited at different substrate temperatures. Note that the peak intensity is increasing as the deposition temperature increases. The deposition temperature and the film thickness are included in the figure. (E) Bar chart summarizing the room temperature XRD results. The length of each bar is the normalized integrated intensity of the edge-on (red) or face-on (blue) stacking peak. Here, to visualize the intensity of both kinds of peaks together, we normalize the peak intensity by converting the edge-on intensity (at 2θ ~ 6.5°) to equivalent face-on intensity (at 2θ ~ 26°) using the Lorentz-polarization factor. In the face-on regime, the crystallinity (closely related to the normalized intensity) increases markedly with increasing deposition temperature.
Fig. 2 In-plane electrical conductivity of oCVD PEDOT thin films. (A) Room temperature electrical conductivity of oCVD PEDOT thin films with face-on and edge-on stacking. The error bar is the 95% confidence interval by seven independent measurements among one typical batch. (B) Comparison between the results from this work with benchmarks. (C) Temperature-dependent electrical conductivity for oCVD PEDOT samples. (D) Zabrodskii plot showing a metallic nature of the PEDOT samples.
Fig. 3 Theoretical modeling to study the charge carrier transport process in oCVD PEDOT. (A) Left y axis: Work function of oCVD PEDOT samples deposited at different temperatures. Right y axis: Room temperature Seebeck coefficient of the PEDOT samples. (B) Calculated transport coefficient σE0 at 300 K. (C) Calculated room temperature carrier mobility of face-on samples deposited at different temperatures and Hall effect–measured carrier mobility. The error bar is based on three samples. (D) Calculated carrier mobility as a function of measurement temperature and fitted energy barrier Wγ of intercrystallite charge carrier transport.
Fig. 4 Out-of-plane electrical conductivity of a series of oCVD-grown PEDOT samples. The conductivity in the out-of-plane direction decreases with the crystallization-orientation transition from edge-on to face-on but increases as deposition temperature increases in the face-on regime. The error bar is the SD based on three samples deposited in different batches. The average thickness of the edge-on and face-on samples can be found in Table 1.
Fig. 5 The device performance of RF rectifiers fabricated using PEDOT-Si Schottky diode. (A) HF Schottky diode structure composed of high work function metallic oCVD PEDOT thin film and n-type Si. The PEDOT-Si Schottky diode converts the input HF AC signals to DC bias to power a load at its output. (B) Optical image of one representative PEDOT-Si RF diode. The zoom-in figure shows the details. The left terminal is the Schottky junction formed between the PEDOT thin film and Si (Au/Ti/PEDOT/Si); the right terminal is the ohmic electrode on top of Si (Au/Ti/Si). The dashed line indicates the mesa isolation region, where the PEDOT thin film is etched away to isolate each electrode. Scale bar, 10 μm. (C) Equivalent circuit of PEDOT-Si rectifying diode for measurement at 13.56 MHz. The capacitance in the circuit is 0.02 μF. Inductance is 8 mH. The load resistance is adjusted for impedance matching. (D) DC I-V characteristics of the PEDOT-Si diode in the log scale. (E) Rectifying performance of the rectifier. The red line denotes the input AC voltage at the frequency of 13.56 MHz, while the blue line is the output DC voltage rectified by the PEDOT-Si diode. The load resistance used here is 55 kilohms.
- Table 1 Summary of the σ⊥ measurement.
Deposition
temperature (°C)Average
thickness (nm)Crystallization
orientationAverage
σ⊥ (S/cm)SD of
σ⊥ (S/cm)Relative vertical resistance
through same area*Anisotropy
(σ///σ⊥)190 387.4 Edge-on 0.00645 0.00304 1 7.33 × 104 190 25.7 Face-on 0.000372 0.000131 1.15 2.88 × 106 300 28.3 Face-on 0.00135 0.000688 0.350 2.05 × 106 *R⊥/R⊥ (190°C-grown edge-on PEDOT) given the same contact area S.
Supplementary Materials
Supplementary material for this article is available at http://advances.sciencemag.org/cgi/content/full/4/9/eaat5780/DC1
Section S1. Methods
Section S2. Additional information about the XRD results and the surface morphology change reflecting the transition of crystallization orientation and crystallinity
Section S3. Thermal stability of oCVD-grown PEDOT thin films
Section S4. Raman/FTIR/XPS of oCVD PEDOT thin films
Section S5. The influence of film thickness on electrical conductivity and batch reproducibility
Section S6. Summarizing the room temperature electrical properties of the oCVD PEDOT samples
Section S7. The effect of HBr rinsing on work function and optical properties
Section S8. The effect of HBr rinsing on crystallization and surface morphology
Section S9. The mechanism of crystallization-orientation transition
Section S10. The discussion about Seebeck coefficient measurement
Section S11. Sensitivity analysis of the Seebeck coefficient measurement
Section S12. The energy barrier Wγ
Section S13. The wafer-scale fabrication of RF rectifier arrays and their performance at other frequencies
Table S1. The XRD peak intensity for oCVD PEDOT samples in Fig. 1E.
Table S2. Crystalline domain size estimated from Scherrer equation.
Table S3. Summary of the growth conditions and the resulting PEDOT thin-film properties for the HBr-rinsed thin films.
Table S4. The fitting results for the parameters in σE0(T).
Fig. S1. The schematic of the oCVD process.
Fig. S2. The thermoelectric and electrical measurements.
Fig. S3. Schematic representation of out-of-plane conductivity measurement.
Fig. S4. The work function of PEDOT samples is determined using XPS.
Fig. S5. The room temperature XRD patterns of oCVD PEDOT thin films rinsed with HBr.
Fig. S6. The surface morphology of PEDOT thin films deposited at different temperatures.
Fig. S7. The thermogravimetric analysis result.
Fig. S8. Room temperature Raman spectra of oCVD PEDOT samples.
Fig. S9. Room temperature ATR-FTIR results.
Fig. S10. XPS for oCVD PEDOT.
Fig. S11. Supplementary data of the electrical conductivity (σ) measured at room temperature.
Fig. S12. The effect of HBr rinsing on work function and optical properties.
Fig. S13. The effect of HBr rinsing on crystallization.
Fig. S14. The effect of HBr rinsing on surface morphology of PEDOT thin films.
Fig. S15. Calculated EF − Et and the sensitivity analysis of the Seebeck coefficient measurement error on the calculated carrier mobility.
Fig. S16. Extracting the energy barrier of intercrystallite charge carrier transport.
Fig. S17. Wafer-scale fabrication of the RF rectifier arrays.
References (36–55)
Additional Files
Supplementary Materials
This PDF file includes:
- Section S1. Methods
- Section S2. Additional information about the XRD results and the surface morphology change reflecting the transition of crystallization orientation and crystallinity
- Section S3. Thermal stability of oCVD-grown PEDOT thin films
- Section S4. Raman/FTIR/XPS of oCVD PEDOT thin films
- Section S5. The influence of film thickness on electrical conductivity and batch reproducibility
- Section S6. Summarizing the room temperature electrical properties of the oCVD PEDOT samples
- Section S7. The effect of HBr rinsing on work function and optical properties
- Section S8. The effect of HBr rinsing on crystallization and surface morphology
- Section S9. The mechanism of crystallization-orientation transition
- Section S10. The discussion about Seebeck coefficient measurement
- Section S11. Sensitivity analysis of the Seebeck coefficient measurement
- Section S12. The energy barrier Wγ
- Section S13. The wafer-scale fabrication of RF rectifier arrays and their performance at other frequencies
- Table S1. The XRD peak intensity for oCVD PEDOT samples in Fig. 1E.
- Table S2. Crystalline domain size estimated from Scherrer equation.
- Table S3. Summary of the growth conditions and the resulting PEDOT thin-film properties for the HBr-rinsed thin films.
- Table S4. The fitting results for the parameters in σE0(T).
- Fig. S1. The schematic of the oCVD process.
- Fig. S2. The thermoelectric and electrical measurements.
- Fig. S3. Schematic representation of out-of-plane conductivity measurement.
- Fig. S4. The work function of PEDOT samples is determined using XPS.
- Fig. S5. The room temperature XRD patterns of oCVD PEDOT thin films rinsed with HBr.
- Fig. S6. The surface morphology of PEDOT thin films deposited at different temperatures.
- Fig. S7. The thermogravimetric analysis result.
- Fig. S8. Room temperature Raman spectra of oCVD PEDOT samples.
- Fig. S9. Room temperature ATR-FTIR results.
- Fig. S10. XPS for oCVD PEDOT.
- Fig. S11. Supplementary data of the electrical conductivity (σ) measured at room temperature.
- Fig. S12. The effect of HBr rinsing on work function and optical properties.
- Fig. S13. The effect of HBr rinsing on crystallization.
- Fig. S14. The effect of HBr rinsing on surface morphology of PEDOT thin films.
- Fig. S15. Calculated EF − Et and the sensitivity analysis of the Seebeck coefficient measurement error on the calculated carrier mobility.
- Fig. S16. Extracting the energy barrier of intercrystallite charge carrier transport.
- Fig. S17. Wafer-scale fabrication of the RF rectifier arrays.
- References (36–55)
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