Research ArticlePHYSICAL SCIENCES

Plasmonic nanogap enhanced phase-change devices with dual electrical-optical functionality

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Science Advances  29 Nov 2019:
Vol. 5, no. 11, eaaw2687
DOI: 10.1126/sciadv.aaw2687
  • Fig. 1 Mixed-mode plasmonic memory cell integrated in a photonic waveguide.

    (A) 3D illustration of device concept. Light is delivered to the nanoscale device via a photonic waveguide, while the Au contacts serve as both device electrodes and plasmonic nanogap to focus incoming light. (B) Optical and (C and D) SEM images of device after fabrication {scale bar [inset of (C)], 100 nm}. The width of the nanogap was measured to be approximately 50 nm for the devices used. (E) Eigenmode simulations of field enhancement inside the plasmonic nanogap when the GST is in the amorphous (top) or crystalline state (region between Au electrodes, bottom). The field enhancement is much stronger when GST is in the amorphous state owing to the significantly lower optical loss. (F) FDTD simulation of the transmission of device before and after crystallization. The significant change in the refractive index changes the coupling between the nanogap and waveguide, which reduces reflection from the input waveguide, thereby increasing overall transmission of the device in the crystalline state. (G) Experimental measurement of total energy in the waveguide required to achieve a nonvolatile phase transition. The switching threshold was measured to be 16 ± 2 pJ according to a linear fit to the data (black dashed line).

  • Fig. 2 Nonvolatile optical programming of the plasmonic memory cell with electro-optical readout.

    (A) Top: Illustration of device programmed using an optical signal with both electrical and optical readout of the device state. Bottom: Schematic of the experimental setup used for electrical programming of the device. Optical write (piecewise pulse, 7.5 mW for 8 ns + 3 mW for 400 ns) and erase (7.5 mW for 8 ns) pulses are used to switch the GST between crystalline and amorphous states, respectively. A continuous wave (CW) optical probe signal and constant voltage source are used to monitor the optical transmission and electrical resistance of the GST simultaneously. Electro-Optic Modulator (EOM), Erbium Doped Fiber Amplifier (EDFA). (B) Real-time trace of the device’s optical transmission during multiple write and erase cycles. (C) Simultaneous readout of the device’s electrical resistance showing nonvolatile switching of the GST between the amorphous and crystalline states.

  • Fig. 3 Nonvolatile electrical programming of the plasmonic memory with electro-optical readout.

    (A) Top: Illustration of programming the memory cell using an electrical signal with simultaneous electrical and optical readout. Bottom: Schematic of the experimental setup used for electrically programming the device. Electrical write (rectangular: 350 mV for 10 ns) and erase (triangular: 350 mV with 5-ns/500-ns rise-fall time) pulses are used to switch the state of the GST between the amorphous and crystalline states. Again, a CW optical probe signal and constant voltage source are used to monitor the transmission and resistance simultaneously. (B) Real-time trace of the device’s optical transmission during multiple write and erase cycles. (C) Simultaneous readout of the device’s electrical resistance showing nonvolatile switching of the GST between the amorphous and crystalline states.

  • Fig. 4 Multilevel operation and cyclability of the mixed-mode device.

    (A) Five consecutive cycles of multilevel operation with a fixed write pulse and a linearly increasing erase pulse energy (8-ns pulse width, 80 erase pulses per cycle). The variation in resistance is much greater than that in optical transmission because of the stochastic nature of crystal domain growth within the nanogap. Cumulative plots of change in (B) resistance and (C) optical transmission for multilevel traces shown in (A). Cyclability plots of both the electrical resistance and optical transmission during multiple (D) optical and (E) electrical write and erase cycles.

  • Table 1 Comparison of various mixed-mode, integrated photonic memory cells.

    Our work not only significantly reduces the active area of the device but also allows full write-erase programming and readout in both the optical and electrical domains.

    DeviceActive area (μm2)Min. switch
    energy (pJ)
    Mixed-mode
    programming?
    Mixed-mode
    readout?
    Nonvolatile?References
    VO2 on waveguide2.0 × 4.01.4 × 103NoYesNo(19)
    VO2 on waveguide0.35 × 0.59 × 102YesYesNo(20)
    Germanium
    Telluride Nanowire
    (GeTe-NW)
    on waveguide
    0.25 × 1.08 × 103NoYesYes(21)
    GST on Surface
    Plasmon Polariton
    (SPP) waveguide
    0.5 × 2.06.9 × 103YesNoYes(22)
    GST on waveguide1.0 × 1.367 ± 3NoNoYes(28)
    GST plasmonic
    nanogap
    0.05 × 0.0516 ± 2YesYesYesThis work

Supplementary Materials

  • Supplementary material for this article is available at http://advances.sciencemag.org/cgi/content/full/5/11/eaaw2687/DC1

    Section S1. Mixed-mode device architecture

    Section S2. Topography measurements of the full mixed-mode device and cross section of the GST bridge

    Section S3. Electrical switching threshold dependence

    Section S4. Optical properties of GST

    Section S5. Comparison of switching and readout mechanisms in the mixed-mode device

    Section S6. Additional FDTD simulations for partially crystallized GST

    Section S7. Multilevel electrical and optical programming

    Section S8. Photosensitivity of the phase-change memory

    Fig. S1. Detailed description of the device architecture.

    Fig. S2. AFM scans of the device focusing on the active region of the PCM.

    Fig. S3. Voltage threshold requirement for electrical switching of the PCM.

    Fig. S4. Optical constants (n and k) of GST used in the FDTD simulations.

    Fig. S5. Illustration for understanding switching and readout mechanism in mixed-mode nanogap devices.

    Fig. S6. Simulation results for four different crystallization conditions in the mixed-mode nanogap.

    Fig. S7. Multilevel electrical and optical programming versus programming energy.

    Fig. S8. Photoconductive effect of the device in amorphous state.

  • Supplementary Materials

    This PDF file includes:

    • Section S1. Mixed-mode device architecture
    • Section S2. Topography measurements of the full mixed-mode device and cross section of the GST bridge
    • Section S3. Electrical switching threshold dependence
    • Section S4. Optical properties of GST
    • Section S5. Comparison of switching and readout mechanisms in the mixed-mode device
    • Section S6. Additional FDTD simulations for partially crystallized GST
    • Section S7. Multilevel electrical and optical programming
    • Section S8. Photosensitivity of the phase-change memory
    • Fig. S1. Detailed description of the device architecture.
    • Fig. S2. AFM scans of the device focusing on the active region of the PCM.
    • Fig. S3. Voltage threshold requirement for electrical switching of the PCM.
    • Fig. S4. Optical constants (n and k) of GST used in the FDTD simulations.
    • Fig. S5. Illustration for understanding switching and readout mechanism in mixed-mode nanogap devices.
    • Fig. S6. Simulation results for four different crystallization conditions in the mixed-mode nanogap.
    • Fig. S7. Multilevel electrical and optical programming versus programming energy.
    • Fig. S8. Photoconductive effect of the device in amorphous state.

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