Research ArticlePHYSICS

Universal quantized thermal conductance in graphene

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Science Advances  12 Jul 2019:
Vol. 5, no. 7, eaaw5798
DOI: 10.1126/sciadv.aaw5798


The universal quantization of thermal conductance provides information on a state's topological order. Recent measurements revealed that the observed value of thermal conductance of the 52 state is inconsistent with either Pfaffian or anti-Pfaffian model, motivating several theoretical articles. Analysis has been made complicated by the presence of counter-propagating edge channels arising from edge reconstruction, an inevitable consequence of separating the dopant layer from the GaAs quantum well and the resulting soft confining potential. Here, we measured thermal conductance in graphene with atomically sharp confining potential by using sensitive noise thermometry on hexagonal boron-nitride encapsulated graphene devices, gated by either SiO2/Si or graphite back gate. We find the quantization of thermal conductance within 5% accuracy for ν = 1;43;2 and 6 plateaus, emphasizing the universality of flow of information. These graphene quantum Hall thermal transport measurements will allow new insight into exotic systems like even-denominator quantum Hall fractions in graphene.


Measurement of the quantization of thermal conductance at its quantum limit (κ0T,κ0=π2kB2/3h), and the demonstration of its universality irrespective of the statistics of the heat carriers, have been important quests in condensed matter physics. This is due to the fact that quantization can reveal the exotic topological nature of the carriers, which is not accessible via electrical conductance measurement (1, 2). Thermal conductance has been measured for phonons (3), photons (4), and fermions (5, 6, 7). However, the definitive proof of universality of the quantum limit of thermal conductance remained elusive for more than two decades (1, 8, 9, 10) until the recent measurements of thermal conductance in fractional quantum Hall effect (FQHE) of GaAs-based two-dimensional electron gas (11). The half of the quantum limit of thermal conductance (2.5κ0T) has also been reported (12) for the 52 state, which has motivated many recent theoretical articles (1316) based on earlier theoretical predictions (1720). However, because of soft confining potential, the edge-state reconstruction leads to extra pairs of counterpropagating edges in the FQHE of GaAs (2125) and makes it complicated to interpret the exact value of the thermal conductance. In this case, the measured value of the thermal conductance can vary from the theoretically (1) predicted (NdNu0T to (Nd + Nu0T depending on full thermal equilibration to no thermal equilibration of the counterpropagating edges (11, 12), where Nd and Nu are the number of downstream and upstream edges, respectively. Attaining the full thermal equilibration at very low temperature is quite challenging as the thermal relaxation length could be much bigger than the typical device dimensions (11, 12). Therefore, the precise measurement of universal thermal conductance requires a system having no such edge reconstruction. Here, we demonstrate that graphene, a single carbon atomic layer, which offers unprecedented universal edge profile (26, 27) due to atomically sharp confining potential, is an ideal platform to probe universal quantized thermal conductance and to unambiguously reveal the topological order of FQHE. The sharp edge potential profile in graphene is easily realized using few-nanometers-thick insulating spacer such as hexagonal boron nitride (hBN) between the graphene and the screening layer (26). Furthermore, the quantum Hall (QH) state of graphene has higher symmetry in spin-valley space [SU(4)], which is tunable by electric and magnetic field, and thus exhibits a plethora of exciting phases, ranging from spontaneously symmetry-broken states (2835) to protected topological states such as quantum spin Hall state near the Dirac point (36). Compared with GaAs, bilayer graphene has several additional even-denominator QH fractions (37), such as 12,32,52, and 72, which has topologically exotic ground states with possible non-Abelian excitations, and some of these exotic phases can be uniquely identified by thermal conductance measurement (1, 2, 28).

In this report, we carried out the thermal conductance measurement in the integer and FQHE of graphene devices using sensitive noise thermometry setup. We first establish the quantum limit of thermal conductance for integer plateaus of ν = 1, 2, and 6 in hBN-encapsulated monolayer graphene devices gated by an SiO2/Si back gate. We then further study the thermal conductance for fractional plateau of ν=43 in a hBN-encapsulated graphene device gated by a graphite back gate. We show that the values of thermal conductance for ν=43 and 2 are the same, although they have different electrical conductance. These results show the universality of thermal conductance with its quantum limit as predicted by theory (1). Our work is an important step to measure half of a thermal conductance and to demonstrate the topological non-Abelian excitaton in graphene hybrids in the future.

We used two SiO2/Si back-gated devices and one graphite back-gated device for our measurements, where the hBN-encapsulated devices are fabricated using the standard dry transfer pickup technique (38) followed by the edge contacting method (see Materials and Methods). The schematic is shown in Fig. 1A, where the floating metallic reservoir in the middle connects both sides by edge contacts. The measurements are performed in a cryofree dilution refrigerator having a base temperature of ~12 mK. The thermal conductance was measured using noise thermometry based on LCR resonant circuit at resonance frequency of ~758 kHz, amplified by preamplifiers, and, lastly, measured by a spectrum analyzer (fig. S2). The conductance measured at the source contact in Fig. 1A for device 1 has been plotted as a function of back-gate voltage (VBG) at B = 9.8 T shown in Fig. 1B, where the clear plateaus at ν = 1, 2, 4, 5, 6, and 10 are visible. The thermal noise (including amplifier noise) measured across the LCR circuit is plotted as a function of VBG in Fig. 1B, where the plateaus are also evident.

Fig. 1 Device configuration and QH response.

(A) Schematic of the device with measurement setup. The device is set in integer QH regime at filling factor ν = 1, where one chiral edge channel (line with arrow) propagates along the edge of the sample. The current ISD is injected (green line) through the contact S, which is absorbed in the floating reservoir (red contact). Chiral edge channel (red line) at potential VM and temperature TM leave the floating reservoir and terminate into two cold grounds (CGs). The cold edges (without any current) at temperature T0 are shown by the blue lines. The resulting increase in the electron temperature TM of the floating reservoir is determined from the measured excess thermal noise at contact D. A resonant (LC) circuit, situated at contact D, with resonance frequency f0 = 758 kHz, filters the signal, which is amplified by the cascade of amplification chain (preamplifier placed at 4K plate and a room temperature amplifier). Last, the amplified signal is measured by a spectrum analyzer. (B) Hall conductance measured at the contact S using lock-in amplifier at B = 9.8 T (black line). Thermal noise (including the cold amplifier noise) measured as a function of VBG at f0 = 758 kHz (red line). The plateaus for ν = 1, 2, and 6 are visible in both measurements.

A DC current I, injected at the source contact (Fig. 1A), flows along the chiral edge toward the floating reservoir. The outgoing current from the floating reservoir splits into two equal parts, each propagating along the outgoing chiral edge from the floating reservoir to the cold grounds. The floating reservoir reaches a new equilibrium potential VM=I2νG0 with the filling factor ν of graphene determined by the VBG, whereas the potential of the source contact is VS=IνG0. Thus, the power input to the floating reservoir is Pin=12(IVS)=I22νG0, where the prefactor of 12 results due to the fact that equal power dissipates at the source and the floating reservoirs (Fig. 1A). Similarly, the outgoing power from the floating reservoir is Pout=12(2×I2VM)=I24νG0. Thus, the resultant power dissipation in the floating reservoir due to joule heating is JQ=PinPout=I24νG0, and as a result, the electrons in the floating reservoir will get heated to a new equilibrium temperature (TM) such that the following heat balance equation is satisfiedJQ=JQe(TM,T0)+JQeph(TM,T0)=0.5Nκ0(TM2T02)+JQeph(TM,T0)(1)

Here, JQe(TM,T0) is the heat current carried by the N chiral ballistic edge channels from the floating reservoir (TM) to the cold ground (T0), and the JQeph(TM,T0) is the heat loss rate from the hot electrons of the floating reservoir to the cold phonon bath. Note that the electronic contribution to the heat current in Eq. 1 is valid in the absence of heat Coulomb blockade, which is discussed in more detail in section S10. In Eq. 1, TM and JQeph are the only unknowns to determine the quantum limit of thermal conductance (κ0). The TM of the floating reservoir in our experiment is obtained by measuring the excess thermal noise, SI = νkB(TMT0)G0 (7, 11, 12), along the outgoing edge channels as shown in Fig. 1A. After measuring the TM accurately, one can determine κ0 using Eq. 1 by tuning the number of outgoing channels (ΔN).


In our experiment, for an integer filling factor ν, the ν chiral edge modes impinge the current in the floating reservoir, and N = 2ν chiral edge modes leave the floating reservoir as shown in Fig. 1A. Figure 2 (A to C) shows the measured excess thermal noise SI for device 1 as a function of source current ISD for ν = 1, 2, and 6 at B = 9.8 T. The increment in the temperature of the floating reservoir as a function of ISD is exhibited in the increase of SI. The x and y axes of Fig. 2 (A to C) are converted to JQ and TM, respectively, and plotted in Fig. 2D for different ν, where each solid circle is generated after averaging nine consecutive data points (raw data in section S7). The T0 ~ 40 mK without DC current was determined from the thermal noise measurement and shown in section S3. As expected, the TM is higher for lower filling factor as less number of chiral edges are carrying the heat away from the floating reservoir. Thus, to maintain a constant TM, higher JQ is required for higher filling factor. In Fig. 2E, we plotted λ (= ΔJQ/(0.5κ0), where ΔJQ = JQi, TM) − JQj, TM), as a function of TM2 for two different configurations (ΔN = 2 and 8) shown by solid circles. It can be seen that the λ is proportional to TM2 as expected from Eq. 1. The solid lines in Fig. 2E represent the linear least square fits and give the values of 1.92 and 7.92 for ΔN = 2 and ΔN = 8, respectively. Similarly, we repeated the experiment at B = 6 T for device 1 and device 2, and the linear fits give the values of 7.76 and 8.64 (figs. S13 and S14) for ΔN = 8, respectively. From these four linear fitting values, the average thermal conductance for a single edge mode is found to be gQ = (1 ± 0.05)κ0T, where T = (TM + T0)/2 and the error is the SD.

Fig. 2 Thermal conductance in integer QH.

Excess thermal noise SI is measured as a function of source current ISD at ν = 1 (A), 2 (B), and 6 (C). (D) The increased temperatures TM of the floating reservoir are plotted (solid circles) as a function of dissipated power JQ for ν = 1 (N = 2), 2 (N = 4), and 6 (N = 12), respectively, where N = 2ν is the total outgoing channels from the floating reservoir. (E) The λ = ΔJQ/(0.5κ0) is plotted as a function of TM2 for ΔN = 2 (between ν = 1 and 2) and ΔN = 8 (between ν = 2 and 6), respectively, in red and black solid circles, where ΔJQ = JQi, TM) − JQj, TM). The solid lines are the linear fittings to extract the thermal conductance values. Slope of these linear fits are 1.92 and 7.92 for ΔN = 2 and 8, respectively, which gives the gQ = 0.96κ0T and 0.99κ0T for the single edge mode, respectively.

To measure the thermal conductance for the FQHE state, we used a graphite back-gated device (device 3), where the graphene channel is isolated from the graphite gate by bottom hBN of thickness ~20 nm. For this device, the lower electron temperature T0~27 mK (section S3) was achieved by introducing extra low-pass filters at the mixing chamber. The conductance plateaus and the thermal noise as a function of VBG at B = 7 T are shown in Fig. 3A, where the ν = 1, 43, and 2 are visible in both measurements. The TM versus JQ plots for different filling factors are shown in fig. S16. In Fig. 3B, we plotted the JQ (solid circles) as a function of TM2T02 for ν = 1, 43, and 2 over the temperature window where the curve is linear, implying the dominance of the electronic contribution to the heat flow. The solid lines in Fig. 3B represent the linear fits (in 0.5κ0) and give the values of 2.04, 4.16, and 4.04, which correspond to gQ = 1.02, 2.08, and 2.02κ0T for ν = 1, 43, and 2, respectively. For ν = 43, two downstream charge modes, one integer and one fractional (inner ν = 13 with effective charge, e*=e3), are expected. The thermal conductance of ν=43 should be the same as ν = 2 having two integer downstream charge modes, which is observed in our experiment. Thus, our result is consistent with the theory that the quantum limit of thermal conductance is the same for both fractional and integer QH edges.

Fig. 3 Thermal conductance in fractional QH.

(A) Hall conductance (black line) and thermal noise (red line) measured in the graphite back-gated device plotted as a function of VBG at B = 7 T. The plateaus for ν = 1, 43, and 2 are visible in both the measurements. (B) Similar to the previous plots (Fig. 2), the excess thermal noise SI is measured as a function source current ISD, and the TM is shown as a function of the dissipated power JQ in figs. S15 and S16, from which we have extracted the JQ (solid circles) as a function of TM2T02 for ν = 1, 43, and 2 and shown up to TM ~ 60 to 70 mK. The solid lines are the linear fits to extract the slopes, which give the thermal conductance values of 1.02, 2.08, and 2.02κ0T for ν = 1, 43, and 2, respectively. One can see that the thermal conductance values are quantized for ν = 1 and 2, and the values are the same for both the ν = 43 and 2 plateaus. The inset shows the corresponding downstream charge modes for integer and fractional edges. The dashed curve represents the theoretically predicted (section S10) contribution of the heat Coulomb blockade (39, 40) for ν = 1, showing its negligible contribution to the net thermal current.

We would like to note that for device 3, the thermal conductance was obtained without varying the number of outgoing channels (ΔN). This may lead to the inaccuracy in the extracted thermal conductance values due to electron-phonon coupling and heat Coulomb blockade (39, 40). However, measuring the right value of the thermal conductance within 5% accuracy for device 3 corroborates the negligible contributions from the electron-phonon coupling and heat Coulomb blockade. The latter is discussed in more detail in section S10. The theoretical estimation (39, 40) of the heat Coulomb blockade for ν = 1 is shown by a dash curve in Fig. 3B. We discuss about the electron-phonon coupling, the accuracy of the measurements, and the effect of the heat Coulomb blockade in sections S8, S9, and S10, respectively.

In conclusion, we measured the thermal conductance for three integer plateaus (1, 2, and 6) and one particle-like fractional plateau (43) of graphene, and the values are consistent with the quantum limit (π2kB23hT) within 5% accuracy. These studies can be extended soon to measure the thermal conductance for the even-denominator QH plateaus in graphene (37) with atomically sharp confining potential to probe their non-Abelian nature.


Device fabrication

Our encapsulated graphene devices were made using the following procedures similar to those used in previous reports (41, 42). First, an hBN/graphene/hBN stack was made using the “hot pickup” technique (38). This involved the mechanical exfoliation of graphite and bulk hBN crystal on the SiO2/Si wafer to obtain the single-layer graphene and thin hBN (~20 to 30 nm). Single-layer graphene and thin hBN (~20 to 30 nm) were identified using an optical microscope. Fabrication of this hetrostructure assembly involved four steps. Step 1: We used a poly-bisphenol-A-carbonate–coated polydimethylsiloxane block mounted on a glass slide attached to tip of a micromanipulator to pick up the exfoliated hBN flake. The exfoliated hBN flake was picked up at temperature of 90°C. Step 2: A previously picked-up hBN flake was aligned over a graphene. Now, this graphene was picked up at temperature of 90°C. Step 3: The bottom hBN flake was picked up using the previously picked-up hBN/graphene following step 2. Step 4: Last, this resulting hetrostructure (hBN/graphene/hBN) was dropped down on top of an oxidized silicon wafer (p++ doped silicon with SiO2 thickness of 285 nm) at temperature of 140°C, which served as a back gate (for the graphite back-gated device after step 3, the graphite flake was picked up using the previously picked-up hBN/graphene/hBN following step 2; after this step, again, step 4 was followed). These final stacks were cleaned in chloroform (CHCl3) followed by acetone and isopropyl alcohol (IPA). The next step involved electron-beam lithography (EBL) to define the contact region. Poly-methyl-methacrylate was coated on the resulting hetrostructure. Contact region was defined using EBL. Apart from conventional Hall probe geometry, we defined a region for floating reservoir of ~4- to 7-μm2 area. We used two SiO2/Si back-gated devices (device 1 and device 2) and one graphite back-gated device (device 3) for the thermal conductance measurement. The edge contacts were achieved by reactive ion etching (a mixture of CHF3 and O2 gas was used with a flow rate of 40 and 4 sccm, respectively, at 25°C with radio frequency power of 60 W), where the etching time has been varied from 100 to 50 s for the SiO2/Si and graphite back-gated devices, respectively, such that for the SiO2/Si device, the bottom hBN is being etched completely, whereas for the graphite back-gated device, the bottom hBN is partially etched to isolate the contacts from the bottom graphite back gate. Last, the thermal deposition of Cr/Pd/Au (5/15/60 nm) was performed to make the contacts in an evaporator chamber having base pressure of ~1 × 10−7 to 2 × 10−7 mbar and followed by lift-off procedure in acetone and IPA. The floating metallic reservoir in the middle was connected to both sides of the graphene part by the edge contacts. This procedure of making devices prevented contamination of exposed graphene edges with polymer residues, resulting in high-quality contacts.


Supplementary material for this article is available at

Section S1. Device characterization and measurement setup

Section S2. Gain of the amplification chain

Section S3. Electron temperature (T0) determination

Section S4. Partition of current and contact resistance

Section S5. Dissipated power in the floating reservoir

Section S6. Determination of the temperature (TM) of floating reservoir

Section S7. Extended excess thermal noise data

Section S8. Heat loss by electron-phonon cooling

Section S9. Accuracy of the thermal conductance measurement

Section S10. Discussion on heat Coulomb blockade

Fig. S1. Optical image and device response at zero magnetic field.

Fig. S2. Experimental setup for noise measurement.

Fig. S3. Schematic used to derive the gain in section S2.

Fig. S4. Gain of amplification chain: Output voltage from a known input signal in QH state at resonance frequency.

Fig. S5. Gain of amplification chain: From the temperature-dependent thermal noise.

Fig. S6. Gain of amplification chain during measurement of device 3 (graphite back-gated device).

Fig. S7. RC filter assembly and thermal anchoring on the cold finger.

Fig. S8. Electron temperature (T0) determination.

Fig. S9. Electron temperature (T0) determination: From shot noise measurement in a p-n junction of graphene device.

Fig. S10. Equipartition of current in left and right moving chiral states.

Fig. S11. Determination of contact resistance and source noise.

Fig. S12. Extended excess thermal noise raw data.

Fig. S13. Extended data of device 1 at B = 6 T.

Fig. S14. Extended data of device 2 at B = 6 T.

Fig. S15. Extended data of device 3 (graphite back gate) at B = 7 T.

Fig. S16. Extended data of device 3 (graphite back gate) at B = 7 T.

Fig. S17. Heat loss by electron-phonon coupling.

Table S1. Gain of amplification chain.

Table S2. Electron temperature (T0).

Table S3. Contact resistance and the source noise.

Table S4. Contact resistance and the source noise of device 3 (graphite back-gated device).

Table S5. Change in thermal conductance for different electron temperature T0.

References (4355)

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Acknowledgments: We would like to thank J. Jain for the critical inputs and help in writing the manuscript. We would also like to thank M. Heiblum for the fruitful discussion. We also thank R. Pandit, H. Choi, Y. Ronen, and V. Singh for the useful discussions. Fundings: The authors acknowledge device fabrication and characterization facilities in CeNSE, IISc, Bangalore. A.D. thanks the Department of Science and Technology (DST), government of India, under grant nos. DSTO1470 and DSTO1597. K.W. and T.T. acknowledge support from the Elemental Strategy Initiative conducted by the MEXT, Japan and the CREST (JPMJCR15F3), JST. Author contributions: S.K.S. contributed to the device fabrication, data acquisition, and analysis. M.R.S. contributed in the noise setup, data acquisition, and analysis. A.D. contributed in conceiving the idea and designing the experiment, data interpretation, and analysis. S.B. contributed in the data interpretation and theoretical understanding of the manuscript. K.W. and T.T. synthesized the hBN single crystals. All authors contributed in writing the manuscript. Competing interests: The authors declare that they have no competing interests. Data and materials availability: All data needed to evaluate the conclusions in the paper are present in the paper and/or the Supplementary Materials. Additional data related to this paper may be requested from the authors.
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